Maxim MAX12557 User Manual

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General Description
The MAX12557 is a dual 3.3V, 14-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12557 is optimized for low power, small size,
and high dynamic performance in intermediate frequen-
cy (IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 610mW while delivering a typical 72.5dB signal-to-
noise ratio (SNR) performance at a 175MHz input fre-
quency. The T/H input stages accept single-ended or
differential inputs up to 400MHz. In addition to low oper-
ating power, the MAX12557 features a 166µW power-
down mode to conserve power during idle periods.
A flexible reference structure allows the MAX12557 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the refer-
ence to be shared between the two ADCs. The refer-
ence structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12557
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.
The MAX12557 supports either a single-ended or differ-
ential input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibil-
ity and help eliminate the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC’s internal duty-cycle equalizer (DCE).
The MAX12557 features two parallel, 14-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two’s complement or Gray
code. A separate power-supply input for the digital out-
puts accepts a 1.7V to 3.6V voltage for flexible interfac-
ing with various logic levels. The MAX12557 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.
For a 12-bit, pin-compatible version of this ADC, refer to
the MAX12527 data sheet.
Applications
IF and Baseband Communication Receivers
Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN
I/Q Receivers
Ultrasound and Medical Imaging
Portable Instrumentation
Digital Set-Top Boxes
Low-Power Data Acquisition
Features
Direct IF Sampling Up to 400MHz
Excellent Dynamic Performance
74.1dB/72.5dB SNR at f
IN
= 70MHz/175MHz
83.4dBc/79.5dBc SFDR at f
IN
= 70MHz/175MHz
3.3V Low-Power Operation
637mW (Differential Clock Mode)
610mW (Single-Ended Clock Mode)
Fully Differential or Single-Ended Analog Input
Adjustable Differential Analog Input Voltage
750MHz Input Bandwidth
Adjustable, Internal or External, Shared Reference
Differential or Single-Ended Clock
Accepts 25% to 75% Clock Duty Cycle
User-Selectable DIV2 and DIV4 Clock Modes
Power-Down Mode
CMOS Outputs in Two’s Complement or Gray
Code
Out-of-Range and Data-Valid Indicators
Small, 68-Pin Thin QFN Package
12-Bit Compatible Version Available (MAX12527)
Evaluation Kit Available (Order MAX12557 EV Kit)
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3544; Rev 0; 2/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART
TEMP RANGE
PIN-PACKAGE
MAX12557ETK
-40°C to +85°C
68 Thin QFN-EP*
(10mm x 10mm x 0.8mm)
*EP = Exposed paddle.
PART
SAMPLING RATE
(Msps)
RESOLUTION
(Bits)
MAX12557 65 14
MAX12527 65 12
Selector Guide
Pin Configuration appears at end of data sheet.
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Summary of Contents

Page 1 - MAX12557

General DescriptionThe MAX12557 is a dual 3.3V, 14-bit analog-to-digitalconverter (ADC) featuring fully differential widebandtrack-and-hold (T/H) inpu

Page 2

MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC10 ______________________________________________________________________________________6065757080853.0

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC______________________________________________________________________________________ 116066646272706874

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC12 ______________________________________________________________________________________PIN NAME FUNCTIO

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC______________________________________________________________________________________ 13PIN NAME FUNCTIO

Page 6

MAX12557Detailed DescriptionThe MAX12557 uses a 10-stage, fully differential,pipelined architecture (Figure 1) that allows for high-speed conversion w

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC______________________________________________________________________________________ 15INBP14-BITPIPELI

Page 8

MAX12557Analog Inputs and Input Track-and-Hold(T/H) AmplifierFigure 3 displays a simplified functional diagram of theinput T/H circuit. This input T/H

Page 9

to GND. Bypass REF_P to REF_N with a 10µF capacitor.Bypass REFIN and REFOUT to GND with a 0.1µF capac-itor. The REFIN input impedance is very large (&

Page 10

MAX12557select either one-half or one-fourth of the clock speed forsampling provides design flexibility, relaxes clockrequirements, and can minimize c

Page 11

externally isolates it from heavy capacitive loads. Referto the MAX12557 EV kit schematic for recommendationsof how to drive the DAV signal through an

Page 12

MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC2 _______________________________________________________________________________________ABSOLUTE MAXIMUM

Page 13

MAX12557The digital outputs D0A/B–D13A/B are high impedancewhen the MAX12557 is in power-down (PD = 1) mode.D0A/B–D13A/B enter this state 10ns after t

Page 14

MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC______________________________________________________________________________________ 21BINARY-TO-GRAY C

Page 15

MAX12557Applications InformationUsing Transformer CouplingIn general, the MAX12557 provides better SFDR andTHD with fully differential input signals t

Page 16

Buffered External Reference DrivesMultiple ADCsThe buffered external reference mode allows for morecontrol over the MAX12557 reference voltage andallo

Page 17

MAX12557ence, allowing REF_P, REF_N, and COM_ to be drivendirectly by a set of external reference sources.Figure 13 uses a MAX6029 precision 3.000V ba

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mount devices for minimum inductance. Bypass VDDtoGND with a 220µF ceramic capacitor in parallel with atleast one 10µF, one 4.7µF, and one 0.1µF ceram

Page 19

MAX12557Total Harmonic Distortion (THD)THD is the ratio of the RMS sum of the first six harmon-ics of the input signal to the fundamental itself. This

Page 20

Gain MatchingGain matching is a figure of merit that indicates howwell the gains between the two channels are matchedto each other. The same input sig

Page 21

MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADCMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a M

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC_______________________________________________________________________________________ 3ELECTRICAL CHARA

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC4 _______________________________________________________________________________________ELECTRICAL CHARA

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC_______________________________________________________________________________________ 5ELECTRICAL CHARA

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC6 _______________________________________________________________________________________ELECTRICAL CHARA

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC_______________________________________________________________________________________ 7ELECTRICAL CHARA

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC8 _______________________________________________________________________________________-2.0-1.0-1.50-0.

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MAX12557Dual, 65Msps, 14-Bit, IF/Baseband ADC_______________________________________________________________________________________ 920403060507080-5

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